The final prepeg thickness is depends on pressure and how many coppers remain in neirbour layers. The used shrinked thickness values are based on real measured values and informations are below. The difference between published layer stack values and online tool come from parameteres from real live. Their online calculator based on POLAR SI9000. But please inform me if it is being changed in the future. Today, I usually don't believe what Altium shows. A lot of bugs are/were in the backgorund (mathematic rounding bugs). Since AD19, their has replaced the internal motor to SIMBEOR, but sometimes AD19, AD20 and AD21 calculates different results for the same situations up to 10% differences. Terrible what Altium does it in their impedance calculator. What do you think? Can you test to see if declaring to the fab shop a design is controlled impedance worth the increased cost? Robertferanec perhaps a topic for a video? If you do a few controlled impedance designs and shop them all out to a variety of fab shops without letting them know that they're controlled impedance designs? Then test all the PCBs you get back to see how close things get to desired values? For any one shop, a single design per week or something so that one design is never part of the same lot as another and so forth. should be enough to get me within +/-10% impedance without having to inform the fab shop that it's a controlled impedance design. I have a hunch that with that much allowable variance that simply calculating appropriate values for trace width and spaces, etc. This allows for a 20% variance, which seems enormous for a feature of the design that's intended to be controlled. I often see on PCB fab notes that tolerances for impedance are +/-10%. Related, what I'm curious about is how close to correct impedance can a designer get if they use the calculators and have the PCB manufactured without informing the fab shop of the controlled impedances.
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